Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Pin assignement

Altera_Forum
Honored Contributor II
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Hi everybody 

 

Can I assign a dedicated clock input pin at 3.3V, into a bank containing LVDS pins only (2.5V) ? 

In fact, I can do that with Quartus, but I would want to know if that is functionnally correct. 

Thank you in advance !
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Altera_Forum
Honored Contributor II
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The best wayto determine that is to do the design in the tool, target a part, make the assignments to the pins, set the "level" of the IO interface type, and try a compile. 

 

If you have a newer tool version, there is an option you can turn on in the pin planner to check assignment (proposed assignments you have made) or if set to be actively checking all the time (the assignment you are trying to make). 

 

Depends on the family, but I think that is allowed.
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