Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Please help

Altera_Forum
Honored Contributor II
3,206 Views

Quartus wrote me this error: error: node line contains "d2" and "d4", but may be named only once 

Can you anybody help me please what is wrong? I am from Czech Republic and I have very BAd english.. Thanks, Witc
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
1,801 Views

try posting the source code.

0 Kudos
Altera_Forum
Honored Contributor II
1,801 Views

Here is all project:

0 Kudos
Altera_Forum
Honored Contributor II
1,801 Views

An absolutely DREADFUL schematic design! I'm surprized that there aren't more inadvertent shorts. 

 

Please look at the oLEDR[10] to oLEDR[12] output connectors. They are all shorted to VCC, causing the said error. The design compiles O.K. after removing the short. 

 

Regards, 

Frank
0 Kudos
Altera_Forum
Honored Contributor II
1,801 Views

Hey THANKS A LOT, it was main problem... THANK FOR HELP 

 

WITC.
0 Kudos
Reply