Everything came right from the power estimator; I was also a little surprised at how low the core current was. I revisited my power calculation, and I changed the I/O load capacitance. It's not clear if the load capacitance column in the power estimator is TOTAL capacitance or capacitance-per-pin. I initially assumed that it was per pin. I changed it to total, which gave me 1300pF (130 pins), which caused the current to jump to about 900 mA. Still, changing that number had very little effect on number of capacitors. And, as I mentioned, I can just arbitrarily put high current values into the PDN tool and still get very few capacitors.
(Full disclosure: I cheated and lumped all my I/O into one module; that shouldn't make a difference).
You have no entry for your core clock frequency. Power to the core will vary dramatically with frequency and % utilization.
Same for I/O power. Static load is not as much a determining factor as is dynamic I/O switching frequency.
The power estimator uses the clock frequency to calculate dynamic power, so that's already accounted for. Further, the Core Clock field is "N/A", and can't be changed (the popup note indicates that you need to be in "custom mode" to enter that. Not even sure HOW to enter custom mode).
Well in that case I don't believe the spreadsheet at all. A 1.2V Vcore at 20mA and a recommended 5ohm target impedance for the power rail are completely unrealistic values. I don't know what inputs you fed into Quartus to generate this spreadsheet but I would go back to the source. Something in your core and I/O clock setup is not correct.