Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Problem selecting image to run using configsel pin on Max10.


I have been working with the simple LED Binary and KnightRider example for the I2C RSU slave example on the 10m08sae144eval board. I have built each project using dual compressed image setting and then used the convert programming files utility in Quartus 17 to combine the .sof files into a .pof file with one of the project's sof files directed to be in cfm0 and the other in cfm1. I then load the pof into ​the eval board using a byte blaster. The result is that whichever project is loaded into cfm1 is the one that runs, no matter what setting I put on switch 6 ( that controls the logic level on the bootsel (configsel) pin). I have verified the switch signal is getting through to pin 126 correctly on the max10. If I erase cfm1 then it falls back to running the image in cfm0. I must have a wrong setting somewhere???? Any help would be appreciated.

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  1. Check the  Option/Boot Info and the ICB setting dialog box. The ICB setting dialog box allows you to set the following:
  • User I/Os weak pull up during configuration.
    • Configure device from CFM0 only.
    • Note: When you disable this feature, the device will always load the configuration image 0 without sampling the physical CONFIG_SEL pin. After successfully load the configuration image 0, you can switch between configuration image using the config_sel_overwrite bit of the input register. Refer to related information for details about Altera Dual Configuration IP core input register.

For more information refer below link.


Let me know if this has helped resolve the issue you are facing or if you need any further assistance.


Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

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