Qsys 13.1 tutorial

[Altera_Forum]

Hi, 

 I have a Cyclone 3 Development board. I want to use its external SRAM, and connect to a custom CPU that I would download into the FPGA. I've not used Qsys before, and I'm having trouble finding a tutorial. I have Quartus 13.1 (since this supports Cyclone 3) but the only Qsys tutorial I found seems to be for later versions, since it refers to using 'IP Catalog' which does not seem to exist yet in Qsys 13.1. Is it possible to find a tutorial for this version which includes instructions how to build a testbench and run simulations with Qsys? Also, since it's my first time using Qsys, would Qsys be used to generate a SRAM controller and interface to the on-board SRAM? Is this correct?

[Altera_Forum]

Try the Quartus II handbook: 

 https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/qts/archives/quartusii_handbook_archive_131.pdf  It has several chapters on QSYS.  Basically QSYS has a library of components already in it, so. Since you are using a custom CPU, instead of NIOS, it may be a bit more complicated, but you should be able to expose the avalon bus and make a wrapper for your CPU to talk to it.   Pete

[Altera_Forum]

You don't use the IP Catalog or it's predecessor the mega-wizard when using QSYS. You didn't say what your dev board is, but if was from a major vendor it would have come with example projects that use SRAM. You can start with that project as a baseline. If the project isn't for a much older Quartus version, you should be able to open it with Quartus 13.1. I'm a hobbyist who likes to try out example projects and add to them. I have several older versions of Quartus installed so I can work with older example projects. Sometimes I'm able to bring them up step by step to the latest Quartus version, sometimes not. 

 I have quartus 12.1 installed because it has both QSYS and the older SOPC builder. You may be able to open an older SOPC builder project with that version. You can then use it to convert the project to QSYS and see if it still works.

[Altera_Forum]

Thanks, I will go through the handbook you provided. 

Looking at the Altera Cyclone 3 Development board handbook, it provides the part number of the SRAM (K1B3216B2E-B170) along with some timing waveforms for read and write to it. Do I even need to use Qsys to talk between my custom CPU and this SRAM? Should i be able to create a basic controller and connect directly to that external SRAM, or does Qsys provide something I'm not thinking of.  I found an an example of a Qsys generated SRAM controller specifically for the Cyclone 3 Development board on the Altera wiki, but I'm still trying to understand how to actually use it. What is the library component you are referring to? the SRAM controller?

[Altera_Forum]

An SRAM is simple enough that QSYS isn't needed unless you need other components as well. Since you have a custom CPU, you can interface it directly if you write your own code and obey the timing requirements in the data sheet.  

 If you want to connect to other things on your board that have QSYS components ready to go you should consider QSYS. It wouldn't be difficult to create a custom QSYS component to house your CPU. Just expose an Avalon or AXI master interface and create a connection to the SRAM in the example you've sited. You could for example use a UART component to connect to the DB9 or USB based RS232 port found on some boards to give yourself a console. Most dev boards have flash you could use as well.