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I want to use rs232 ip core in qsys without nios2, is it possible ?
I made it with vhdl code but now i want to use qsys and use ipcores. Thanks.Link Copied
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This is a very interesting question, I am considering doing the same thing. I did some searching. I think that you need to make the VHDL module compliant with the Avalon bus. Then you can use Qsys -> add new and configure your module. I have several vhdl modules that I would like to tie together with Qsys, so that I could use the System Console . . . hence the same motivation. Best, James
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Sorry, maybe my idea was not explained correctly:
I want to use the rs232 ipcore that is integrated with Qsys and use it in my own design with 8 switches (data to send) and a button to start transmition.- Mark as New
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you can create avalon-MM master same level as NiosII.
you can access each registers in the rs232c-ip core. but, why not use NiosII? the idea of CPU is to make things easy. please consider about my advice. see you.- Mark as New
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I don't want to use nios2 because I have to design other systems (in verilog or vhdl with specific characteristics) and maybe send output data of my system by serial port or save it in a external memory (SD card, sdram), etc.
In other words: my objective is the design of my system (modulation, filters, etc). not the design of sd card, or sdram interface, is this the reason why i am want to use rs232,sdram, or sd card interfaces ip cores in qsys. Do you have suggestions or comments ??? Thanks.- Mark as New
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You just need a custom master that will read the status registers before performing data movements. This is necessary so that you don't inadvertingly over/underflow the FIFO TX and RX registers. So a simple state machine could do this.
Creating such a master would probably take a day to implement whereas using Nios II would take minutes to write the code since the driver is done for you and it would be more flexible too (error checking into the UART data stream for example would be dirt simple with Nios II).
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