Readback of configuration bitstream

[Altera_Forum]

Hello everyone, 

 I need to know if there is some way to readback the entire configuration bitstream of a Cyclone IV FPGA, so that it can be compared bit by bit with the reference bitstream stored, for instance, in a external parallel flash configuration memory. I know there is a CRC_ERROR output pin that tells when there are any bit flips in the configuration memory, but it does not tell how many. What I'm interested is actually counting the number of bit flips.  Thank you in advance for your advice, Regards

[Altera_Forum]

You can read back the configuration memory, but not the FPGA internal SRAM content. Some FPGA vendors are offering this option, Altera apparently never did (according to the documented device properties).

[Altera_Forum]

Yes, this is not possible. (And for anti-tamper type stuff, consider a security feature.) The CRC_ERROR can run pretty frequently, so unless you're expecting a burst of errors, I think the odds of multiple might be extremely low. (Are you doing some sort of device analysis, i.e. forcing errors somehow and then counting the number of errors)?

[Altera_Forum]

Thank you for your answers. It seems the only solution available is to use CRC_ERROR pin for error detection and then to immediately trigger a device reconfiguration. This way odds are low that a soft error occurs and can't be counted. 

Regards