Regarding Cyclone5 SOC Hello World Code Design Flow

[Altera_Forum]

Hi all, 

I am using Cyclone5 SOC Device and i need to write a small HELLO WORLD Program using QuartusII 13.1 and ARMDS-5 Tools. So i opened new project QuartusII 13.1 tool and in qsys added "Hard Processor System" and "on chip memory" blocks and generated instantiated file and added in top file. Added .qip file to project ---> run tcl script file ----> compiled the project successfully.  Opened Embedded command shell ---> BSP-editor ---> added "hps_isw_handoff" path and generated "SPL_BSP" Folder ---> make.  Now i opened typed eclipse in command shell and opened ARM DS-5 tool. File --> Import --> C/C++ --> Existing code as makefile project --> added SPL_BSP Folder -->  Now i need to write a small Hello World program and by linking to above SPL_BSP Folder. How shall i do .  Kindly reply me if any one knows.    Thanks  venkat

[Altera_Forum]

This way is very complex! 

FPGA programming and BSP compiling not need for run independent HPS simple program in first case! In http://www.altera.com/literature/ug/ug_soc_eds.pdf shown detail work with examples of HW! programs. Need to be import prepared programs from archive (<Quartus/SoC EDS root>/embedded/examples/software/ contain 9 files for different platforms of developing and severity, 3 is HW!) to DS-5, compile and debug. Preloader (spl_bsp) is preceding 2nd phase of run application (after BootROM), its target is init SDRAM and load your program to it and run. After running this programs you may try link it to FPGA part and interact (Altera-SoCFPGA-HardwareLib-* examples), then may be need add "hps_isw_handoff" in spl_bsp to give in Preloader init your hardware configuration before launch main Baremetal application or u-boot/Linux.

[Altera_Forum]

Thanks for your reply. 

 How does the hardware project (Selection of HPS, GPIO, UART )relate with the software project (Altera-SoCFPGA-HardwareLib-* examples).   Regards venkat