Hello everyone:
I have designed an SDRAM Controller that allows burst writes or reads of 1, 2, 4, 8 or 256 (Full Page). Now, I am testing this controller and everything seems fine except for the full page write. When I test a full page write, the first value written is exactly the same as the last value, for some strange reason I can't understand.
I have used SignalTab, but according to the results I obtain, the first value being written is what it is supposed to be. However, when I read the first value written in the SDRAM, I get the last value. This happens only with the full page burst, because burst writes of 1, 2, 4 or 8 work fine.
I will give you some information, that might be useful:
- I am working on the Altera DE-2 Development Board.
- SDRAM is ISSI IS42S16400D -7TL ABR13400FH 0622.
- I am using a 100-MHz clock for the SDRAM controller, and a 100-MHz clock with a phase shift of -3ns for the SDRAM clock (recommended for the DE-1 board, so I am not sure if this phase shift is appropriate for the DE-2).
- I am writing pseudo-random values using a LFSR to test the SDRAM. The first value is 0x0001 and the last value is 0x3E03 (no relation at all).
- If I write the 256 values, one by one (burst length = 1), there is no problem. Same goes for burst lengths of 2, 4 and 8.
Thank you in advance for any help.
