SDRAM giving incorrect data during read

[Altera_Forum]

I have setup SDRAM controller using Qsys. Now first I was writing a value of '0001H' at address '95FFFH', and then after some clock cycles, I make a read by putting the read line at low / '0' and I see that waitrequest gets high, after some cycles, read data valid appears, but it throws wrong data which is '0801H' (which supposed to be '0001H'). Why is that? Thanks 

   https://www.alteraforum.com/forum/attachment.php?attachmentid=8704

[Altera_Forum]

are you sure that you use the correct polarity on the read and write signals? The lack of a '_n' postfix in the name seem to indicate that they are active high signals.