SDSoC

[Altera_Forum]

Hello guys. 

 I have been developing in QuartusII for several years. I still have many things to learn.  Even so, my boss want to change device. because of Xilinx's SDSoC. he want us to develop system inC/C++. he thinks it is easer than HDL.  but I know SDSoC can not handle 100% of FPGAs performance. Also changing tools just for such reason is risky.  since my boss is not an engineer, he can not listen my advice.  so my question is that if Altera has same kind of system or therd party tools like SDSoC. if so, I can persuade him(I hope so)  Could someone help me?

[Altera_Forum]

You make some valid points about why it may not make sense to switch horses, and management usually underestimates the time and cost of making changes like this, but you should at least check out what Xilinx has to offer. Download a free version of the tools, play with some reference designs, etc. Maybe even get your boss to pay for some classroom training. I was pretty impressed with Vivado. Xilinx has come a long way in the last 4-5 years. As for an Altera equivalent for SDSoC, I don't think so but I have not been paying close attention.

[Altera_Forum]

Have you investigated OpenCL at all?

[Altera_Forum]

hi rsefton. 

thank you for your advice. actually, my member is researching SDSoC in Vivado. I am waiting the simulation result.  hi, sstrell. year I know there is OpenCL. it is nearest idea in QuartusPrime so far.  I just found Altera(Intel FPGA) is publishing same kind of idea. it is called Intel HLS Compiler.  there is not much information. I keep researching it ( or others ).  thanks anyway.