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SV Assertions

Altera_Forum
Honored Contributor II
‎01-01-2011 05:26 PM
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Hi,  

 

I am new to SV Assertions. 

 

I wanted to know if I can check a simple clock/3-divider using assertions. 

 

All I need to check is if a "Divider_enable" i/p is high, the output clock should be i/p Clock divided by 3. 

 

Is it possible to check this using assertions? 

 

Thanks in advance 

SV Baby
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