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Shift out design within state machine

Altera_Forum
Honored Contributor II
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Greetings. 

 

I have a questions I cannot find in any books.  

 

I have several binary sequences I need to shift out in a shift register. there are seven of them ranging from 24 bits to 48 bits. They are basically error codes I am using to flash an LED in a specific pattern.  

 

I am writing a case statement that uses an 8 bit number as an input, clocks it in and then analyzes it. Once the binary number is determined it moves to the state and clocks out a specific sequence of 1's and 0's a half a second per bit.  

 

The problem is that the bit streams are all different length and I am trying to think of a creative way to output a different length binary stream. Worst case I could make a state machine for every single binary output but this would use a lot of logic elements up. Are there any other methods to shift out binary sequences of varying lengths within a state machine or a case statement? 

 

Thank you
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Altera_Forum
Honored Contributor II
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Whatif you choose longest length for a shift register. Insert your bits into the shift register starting from one end. Then enable shift for the number of bits that you inserted.

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Altera_Forum
Honored Contributor II
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Kaz's idea would probably be the simplest. 

But could not use the input number as the load value for a down counter?
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Altera_Forum
Honored Contributor II
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The problem is that the bit streams are all different length and I am trying to think of a creative way to output a different length binary stream. Worst case I could make a state machine for every single binary output but this would use a lot of logic elements up. Are there any other methods to shift out binary sequences of varying lengths within a state machine or a case statement? 

 

--- Quote End ---  

 

 

Page 45 has an example that may work for you too: 

 

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf 

 

Cheers, 

Dave
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