Hello, I was wondering if anyone had problems using Digitally Controlled Impedance on the Stratix II? If anyone has experience with or comments on DCI, please let me know.
Can you clarify, which Stratix II feature you'tre referring to? DCI or digitally controlled impedance isn't a used term in Stratix II or other Altera documents, as far as I know.
Hello, thanks for responding to my post. I probably should have said "on-chip" termination. I did a search the only the information I found was http://www.altera.com/literature/an/an384.pdf. I email a vendor about on-chip termination and they mentioned DCI (Digitally Controlled Impedance). I guess I misunderstood him. I co-worker was using on-chip termination and it seems not to be working and I was trying to help.
On chip serial termination, which is addressed in the said application note, is working fine with all newer Altera FPGAs, I think. So you may want to clarify in which regard it's not working for your colleague?
