Stratix IV TR4 and fast ADC (3.6 GSPS)

[Altera_Forum]

Hello to everyone, 

 I am new to this forum and to the world of FPGA boards. I have been looking around for a long time, in order to choose the right develpment board for my appliccation, and now I am stuck into a problem/doubt which I would like to solve in the next time.  Basically I would like to sample a signal with a maximum frequency of 1 GHz and process it by using a FPGA Board, and I would like to do it with devices already available on the market. After a long research I came to a reference board produced by Texas Instruments mounting the ADC12D1800RF which is able to sample at a maximum rate of 3.6 GSPS by using interleaving. The evaluation board comes with a FMC connector where I can stream the data down. This board has also a Virtex IV FPGA on board, taking care of the data transfer from the ADC, and possibly programmable in order to execute other tasks.  For a question of necessity, I have chosen to use a TR4 Dev board, mounting a Stratix IV FPGA chip, which is very attractive for the performances and for the number of HSMC connectors available on it (4 of them are supporting LVDS, which I need for my ADC and DACs).  The question now is, as I am still not an expert with FPGAs and their interfacing with such hardware devices, would I be able to read out without any loss the data stream coming from my ADC (4 channels)? With 3.6 GSPS, and by using a LVDS connection (through HSMC), will I saturate the transceivers of my FPGA? Do I need to de-serialize the data? Or may I choose for another development board mounting high speed transceivers in order to do this?  I cannot still post any link but these are the devices which I would like to interconnet:  ADC12D1800RFRB from Texas Instruments  TR4 Dev. Board from Terasic   I would be very gratefull for every advice or direction getting me back to the right path.  All the Best. Giovanni

[Altera_Forum]

Hi Giovanni, 

 The Texas Instruments ADC12D1800RF is probably an old National Semiconductor part. There is a signal processing group at Berkeley that uses these ADCs on some of their Xilinx based hardware, eg.,  https://casper.berkeley.edu/ https://casper.berkeley.edu/wiki/hardware  There may be performance test results on that site that will indicate what level of performance you can achieve with that ADC.   Personally I have used the e2v parts (previously from Atmel), eg., see this page  http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/~dwh/carma_board/index.html)  Given that you want to use a TR4 and the TI part is already in an FMC form-factor, you will need an FMC-to-HMSC adapter. They exist, but I have not tried using one. The Arria V kit comes with an FMC connector, so that might actually be a better choice;  http://www.altera.com/products/devkits/altera/kit-arria-v-gx.html  Regarding the speed of the LVDS links and how many are required, just read the data sheet. I suspect you'll find that the 3.6GSps samples are demultiplexed by 4, so the LVDS data rate is 3.6G/4 = 900Mbps, which is not too bad for LVDS. The link I provided above has a document (digitizer_tests.pdf) that show Stratix II LVDS tested at 1Gbps.  Cheers, Dave

[Altera_Forum]

Thanks a lot Dave, 

 I will have a look at the links which you have gave to me.  I have already took into account the possibility to use a Arria V FPGA Board, exactly because of the presence of that connector, but as I want to have better real time performances, I was pointing out that a Stratix IV processor, even if it´s an older product, has still better "numbers" than Arria V, furthermore the TR4 board comes with 6 HSMC connectors, which is still a good point for my set up, as I want to connect more daughter boards to my FPGA system.  I will have a look and maybe I´m coming back here to this post for some feedbacks.  All the best,  Giovanni.

[Altera_Forum]

--- Quote Start ---   I want to have better real time performance   --- Quote End ---   You cannot arbitrarily decide that one is "better" than the other. Create a design and synthesize it into each of the boards you are thinking about using. The design will either fit and meet timing, or it will not.    --- Quote Start ---   the TR4 board comes with 6 HSMC connectors, which is still a good point for my set up, as I want to connect more daughter boards to my FPGA system.   --- Quote End ---   Double-check that each of the connectors it pinned out. For example, if the board is loaded with an E series FPGA, then the HSMC will not have transceivers connected (I don't have this board, so cannot comment on whether this is true or not).    --- Quote Start ---   I will have a look and maybe I´m coming back here to this post for some feedbacks.   --- Quote End ---   Sure, I'll respond if I see the question.  Cheers, Dave

[Altera_Forum]

Hello Dave,  

 thanks a lot for your advices, they were really helpful!  I have finally received all the hardware, and I want to start developing and testing my design. As a starting point, I am trying to figure out, how the signals incoming from my ADC are being transfered to the board (i.e. what every pin on the connector stands for). Are there any interesting references about the interfacing and specially about the HSMC connector on the boards?  I am working now with a TR4 FPGA Develpment board (from Terasic).  Al

[Altera_Forum]

--- Quote Start ---   I have finally received all the hardware, and I want to start developing and testing my design. As a starting point, I am trying to figure out, how the signals incoming from my ADC are being transfered to the board (i.e. what every pin on the connector stands for). Are there any interesting references about the interfacing and specially about the HSMC connector on the boards?  I am working now with a TR4 FPGA Develpment board (from Terasic).   --- Quote End ---    The TR4 support documents should have everything you need for the FPGA pinout. Typically what I do is find the schematic and the golden_top (top-level reference design) and create a Tcl pin assignments constraints file. I then look at the schematic to check the pin assignments. If the TR4 board ships with the OrCAD capture schematic, then its also possible to use Tcl from within capture to print out the net names connected to the pins on the FPGA (a nice way to get the pin assignments from the schematic).  As for the ADC board. What hardware do you have? The HSMC specification has the pin assignments for the LVDS and high-speed signals. The documentation for your ADC board should have details on what signals they have used on the HSMC connector.  Cheers, Dave

[Altera_Forum]

Hi Dave,  

 I have decided to come back to this post, in order to give some updates and maybe share some knowledge for whoever would like to interface the ADC12D1800RFRB to his/her Altera FPGA board. We have actually found an HSMC to FMC adapter developed by Kayan Instruments. The point is that it doesn´t really do the job while is just rounting pins for the LPC standard. It allows us to read just two channels out of the ADC. As you mentione in your answer some time ago, our ADC is deserializing the data into 4 channels of 900 MHz each. Each channel is bringing samples of our RF signal interleaved (namely for the instants t, t+1, t+2, t+3).  We could do some routing efforts on the Virtex 4 FGPA, coming with the ADC12D1800RF Reference Board, but the point is that we would like to be able to manage such datarates on our Altera development board.  The option of using an Arria V Development kit would be to take into account as you mentioned some time ago, but reading the manual it seems like it is conceived in order to be used with QAM DACs. Also on the TI page we see examples of configuration using ArriaV and the DAC34SH84 EVM, connected to the FMC connector through an apposite adapter. My colleague also pointed out that for our application, where we would like to read the whole 4 ADC channels, the connector on the ArriaV is still missing the mapping of some signals which we would need.    Looking around on the internet, we still couldn´t find examples of people interfacing such ADC board to an Altera device. I case of any news I will come back to this post.  Cheers,   Giovanni

[Altera_Forum]

Hi Giovanni, 

 Thanks for the update!  Is there any reason you cannot just build your own adapter board? For example, if you look on the TI web site, you'll see they have an FMC to Mictor connector breakout for logic analyzers. You could create something like this, but replace the Mictor connectors with the larger Samtec connectors used for HSMC. Alternatively, just create your own ADC board with all the connections you need.  I have never been able to find ADC development kits that meet my needs, however, using the reference boards at low speeds is typically worth their cost, just to get an example design working.  It sounds like you're at the point where you need to decide what you need to design and build.  Cheers, Dave