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The issue of multiplier synthsis in Arria V

Altera_Forum
Honored Contributor II
‎02-03-2015 05:50 AM
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I get 20bit data from data bus and split it into two section, high 10bit and low 10bit. They are shifted left 6bit to form 16bit data respectively, I_16bit and Q_16bit. Then I_16bit is input into a multiplier with two input ports, and Q_16bit is input into another multiplier with input ports. Another input of these two multipliers is given a special data. The output of these two multipliers are added together to produce a result. But when carry out synthesis operation, these two multipliers are cancelled. Please give me a solution to avid this problem. Thanks a lot.

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