Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Using differential pins with LVDS capability without buffer

DGugl
Beginner
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Hi, this is most likely a stupidly simple question, i just wanted to know if on max10 devices once can use the differential pins without the deserializers mentioned here

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_lvds.pdf

 

in general, the question would be whether the differential receivers can be connected directly to the fpga matrix

 

thanks

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Rahul_S_Intel1
Employee
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Hi,

From your question, I am interpreting that the IO can be used as LVDS IO standard with out connecting to the LVDS SERDES IP.

 

>> Yes can be used, you have to change the IO standard to LVDS from the pin planner

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