Warning (169180): Following 4 pins must use external clamping diodes.

[HAlex]

Hello

I am using EP4CGX150CF23C8 connected to EPCQ128ASI16N flash at ASx1 mode.

Serial flash should store 2 images (factory and application) and should work at remote update mode.

When I setup Serial Flash Controller II Intel FPGA IP at Platform designer after a project compilation I get a warning: "Warning (169180): Following 4 pins must use external clamping diodes" related to configuration pins: DCLK, DATA0, SCE, SDO.

On my board I have an option of assembly only of 1 external clamping diode on DATA0 (as previously at board's PCB layout stage I defined a Legacy EPCS/EPCQx1 Flash Controller Intel FPGA IP and had this 'must' warning - 169180 related only for a single pin - DATA0).

Is it really a must to use additional 3 diodes for output pins from FPGA (DCLK, SCE, SDO)?

The connection between serial flash and FPGA is direct without any external connectors (flash programming/reading will be only through FPGA - like SFL mode).

Thank you

Alex

[hareesh]

hi HAlex,

please go through given article link. you can find out Warning (169180): Following pins must use external clamping diodes details.

link :

https://www.intel.in/content/www/in/en/support/programmable/articles/000077750.html

thanks,

[HAlex]

Hello

In my board the connection made exactly by Handbook recommendation (figure 8-29):

There are no diodes mentioned in Cyclone IV Handbook.

I raised the diode's question only after getting a Quartus warning (and this is after the board's layout is finished and the board is at production now).

Diode's are shown in Handbook only in connection with additional header like on figure 8-28.

My question: is the Quartus warning related only to connections described like on figure 8-28 and it is not relevant to my case?

Thank you 

Alex 

[hareesh · Accepted solution]

Hi Alex Halfin,

if you see in fig. 8 - 28 it has two headers. one for JTAG mode header and another one AS mode header. if you following combine the AS configuration scheme with the JTAG-based configuration then follow fig. 8-28 schematic or following programming of a serial configuration device with the JTAG interface then AS mode header and those diodes are not required. 

Cyclone IV Device Handbook pdf link attaching here

https://www.ee.ryerson.ca/~courses/ee8205/Data-Sheets/sopc/cyclone4-handbook.pdf 

Thank you 

Hareesh.

[hareesh]

hi @HAlex,

I think you got solution to issue. so, shell I close the case.

thanks,

[HAlex]

Hello

You can close this case but I think you should fix the description of this warning (169180) at Quartus software as a must warning.

As actually it is not must for all configurations and must only for non-SFL connection of serial flash to the FPGA as described in figure 8-28, and not must for configuration as I did according the figure 8-29.

Thank you

Alex