Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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What file I need to edit to do this workaround? https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/component/2017/error--14703---invalid-internal-configuration-mode-for-design-wi.html

SGaut7
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sstrell
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This is in your HDL code for inferring the RAM. If you initialize your RAM in the process of inferring it in your code, it automatically creates a .mif file to initialize the RAM at configuration time. If you're adding a RAM to your design as IP from the IP Catalog instead of inferring in your code, you would not need to worry about this.

 

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