What is clklow signal of fPLL

[SJadh1]

Hello,

I would like to know what is clklow signal of fPLL.

What is its relation of reference clock input to fPLL ?

Thanks & Regards,

Sachin Jadhav

[Rahul_S_Intel1]

Hi ,

The clklow is been explained in the page no: 363 of the below document.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/ug_arria10_xcvr_phy.pdf

This signal should be used with Intel external soft lock detection logic.

[bitstreamer]

That's a direct quote from the user guide, but I don't think this answers the question. Where is the external soft lock detection described? Google doesn't show any reference for an Intel soft lock circuit.