I would like to know what is clklow signal of fPLL.
What is its relation of reference clock input to fPLL ?
Thanks & Regards,
The clklow is been explained in the page no: 363 of the below document.
This signal should be used with Intel external soft lock detection logic.
That's a direct quote from the user guide, but I don't think this answers the question. Where is the external soft lock detection described? Google doesn't show any reference for an Intel soft lock circuit.