What is the fastest way to detect transceiver input line rate in a Cyclone 10 GX?

[Hamster]

I would like to support multiple rates with a transceiver in a Cyclone 10 GX. Let's say I want to support 1.25/2.5/5/10G. The line rate at the input can change at any time, and there is probably a flag that indicates the input is not locked anymore. What is the fastest way to figure out what the new line rate is to reconfigure the transceiver to run at that line rate?

[Deshi_Intel]

Hi,

Pls see my reply below.

1. The line rate at the input can change at any time, and there is probably a flag that indicates the input is not locked anymore.

• Yes, NativePHY IP does has "cdr_lockedtodata" status signal to indicate whether Receiver channel CDR loose lock or not

1. What is the fastest way to figure out what the new line rate is to reconfigure the transceiver to run at that line rate ?

• There is no so called fastest way as this is typically handled on high level IP protocol layer and not by physical layer.
  • Your high level application first need to decide what data rate you want to run
  • then put the FPGA receiver channel into reset, reconfigure the transceiver receiver channel to support new data rate
  • finally new data rate input data only come in to the receiver channel again

Thanks.

Regards,

dlim