Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

Why NOT Arria 10 recommand OCT for Differential SSTL-18?

Adams_Hu
Novice
1,224 Views

Hi 

 

In Arria 10 datasheet, Altera recommend internal OCT for differential SSTL-15 & differential SSTL-12 but differential SSTL-18?  It looks like LVDS bank supports the serial resistor on output and termination resistors on input.

0 Kudos
4 Replies
AqidAyman_Intel
Employee
1,157 Views

Hi,


Thank you for reaching out Intel FPGA Community.


From what I understand, for Differential SSTL-18 Class I and II, there is mentioned that it is recommended to use Differential SSTL I/O Standard Termination as the external termination scheme.


Regards.





0 Kudos
Adams_Hu
Novice
1,103 Views

Hi 

 

You mean I can also turn on OCT to compliant with Differential SSTL-18 Class I & II instead of external termination scheme?

 

Best Regards

0 Kudos
AqidAyman_Intel
Employee
1,089 Views

Hi,


May I know the configuration used such as I/O Standard and the OCT values? The information helps us to advice further.


Regards,

Aqid


0 Kudos
AqidAyman_Intel
Employee
1,049 Views

As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


0 Kudos
Reply