arria10 u-boot from sd card with early release

[TG_GER]

Hi,

I am currently working with an Arria 10 board utilizing U-Boot and Yocto on an SD card. Presently, the device successfully boots with a full FPGA configuration and an autobootscript from U-Boot.

However, I am now looking to implement PXE boot functionality. To achieve this, we have built the FPGA with early and core configurations. I have made adjustments to U-Boot, and it successfully loads the early release and calc the external RAM.

My current challenge lies in loading the core FPGA configuration from the U-Boot CLI using the SD card. I am able to load the core RBF file into RAM, and then I attempt to configure the FPGA using the command "fpga load 0 address and size". Unfortunately, after this step, U-Boot hangs, necessitating a power cycle to recover.

I would greatly appreciate any guidance or insights you can provide to help resolve this issue.

Thank you,

[JingyangTeh]

Hi

There is an article in Rocketboards that could be of interest to you.

https://www.rocketboards.org/foswiki/Documentation/BootingAlteraSoCFPGAFromNetworkUsingTFTPAndNFS

It shows the method of transferring the kernel image and rootfs through TFTP and booting the rootfs from a NFS location.

Regards

JIngyang, Teh

[JingyangTeh]

Hi

Any update on this case?

Is the remote boot what you are looking for?

Regards

Jingyang, Teh

[TG_GER]

Hello,

I hope this message finds you well. I apologize for my absence as I was on holiday, but I am now back and ready to resume work.

I have already reviewed the page you mentioned.

My initial focus is on manually configuring the core FPGA from the SD Card using the u-boot Command Line Interface (CLI).

Once I confirm the success of this step, I will proceed to the second phase, which involves implementing the download from TFTP.

Unfortunately, I have not made any progress yet.

It consistently freezes during the loading of the core configuration into the FPGA.

I have confirmed that the core configuration is fully present in the RAM by extracting the hex data from the RAM.

Any insights or guidance on resolving this issue would be greatly appreciated.

Thank you for your assistance.

[JingyangTeh]

Hi

I see that you are loading the fpga data to an address that might be in conflict with the uboot code in the RAM.

This might cause the uboot to reset.

May I suggest that you load onto the address pre-defined in the ${loadaddr}  variable or an address at 0x2000000.

Regards

Jingyang, Teh

[JingyangTeh]

Hi

Any update on this case?

Regards

Jingyang, Teh

[JingyangTeh]

Hi

Since there are no feedback for this thread, I shall set this thread to close pending. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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Regards

Jingyang, Teh

[TG_GER]

Thank you very much for the response.

I was on vacation for 2 weeks over Christmas and New Year's, and I'm now back.

First of all, I wish you a Happy New Year.

I just tried it again with the address you mentioned and also with the defined 'loadaddr',

but unfortunately, I'm still facing the same issue.

Could there be something in my config or in the device tree source (dts) that is not quite right?

Best regards,

Torben Geldermann.