Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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do you need different drivers for reference clocks for A10GX?


I have three GXB transceiver functions in this design (PCIe, 10GE, triple-speed Ethernet); all of them have reference clock inputs, and all of the constrained pin types for those reference clocks (constraints chosen by the tool) are different (PCIe uses HCLS, 10GE uses LVDS, 3-E uses CML).


The A10 data sheet provides the same input specification for all of these receiver technologies:



It basically says the inputs will be happy with a differential input between 200 and 1600 mV; there seems to be no other electrical difference apart from the common-mode for CML operation.


Do I need to use a different driver type for each of these?

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Hi Andy, I would like to apologize for the delay in response. It seems like I encounter some issues with notification reaching my mailbox. Sorry for the inconvenience. As I understand it, you have some inquiries related to the A10 XCVR refclk input IO standards. For your information, the A10 XCVR refclk input is able to support a range of different IO standards as listed in the datasheet. User will have the flexibility to different the IO standard according to the on-board oscillators used. For example, if you oscillator output LVDS signals, then you can do LVDS IO standard assignment for the refclk input pin driven by this oscillator. Note that you would also need to cross check the oscillator output specs to ensure it is meeting our datasheet requirement. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
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