fast input registers routed over HPS Loan I/O Pins

[Altera_Forum]

Hi, 

 I have a Cyclone V SE with a design that includes an SDIO Host Controller IP in order to attach an SDIO WiFi-Module to the System.  The SDIO Host Controller IP needs fast input registers. When I try to route the SDIO signals over HPS Loan I/O Pins, Quartus Fitter ignores the 'fast input register' settings for SDIO CMD, SDIO_DAT[3..0].   Is there any way I can use fast input registers with HPS Loan I/O Pins?  Best regards, Tobias

[Altera_Forum]

In Cyclone/Arria V the loan I/O have fewer features. The I/O registers are not present which is why loan I/O are not recommended for high speed interfaces. The HPS peripherals are registered but they do not rely on the register stage in the I/O and implement their own instead. These I/O also lack DDR capabilities so you can't route other things like a TSE out to them.