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how can “EPCQ“” Flash store both FPGA Image and customer user parameters ?

JET60200
New Contributor I
702 Views

dear,

our A10 GX board has an EPCQ1024L Flash, we can burn FPGA image into it and power up board to run it successfully.

 

Now we have some customer parameters which needs to be stored on-board flash as well. so we wanto divide this EPCQ1024L Flash into two parts, one part is to store FPGA image, and the other part is to store some customer data for every special board.  How can we get it ?  Is there any guide to realize it ?

 

thanks in advance

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NurAiman_M_Intel
Employee
682 Views

Hi,


Thank you for contacting Intel community.


Kindly refer to AN370 below for Using the Intel FPGA Serial Flash Loader with the Intel Quartus Prime Software:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an370.pdf


On top of that, please set a specific address in Convert Programming Files and reboot the EPCQ flash from that particular address..


Thanks.


Regards,

Aiman





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JET60200
New Contributor I
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hi @NurAiman_M_Intel , thanks for reply,

Even though we can boot up fpga from the serial flash device with a specified starting address, how can FPGA access (i.e read ) that "customer parameter partition" in serial flash when FPGA runs up ?  Is there any exampe from FPGA side to read/write the serial flash ? 

 

WE need fpga to read customer parameters & data  wich stored inside the serial flash // 

 

Thanks in adv

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NurAiman_M_Intel
Employee
658 Views

Hi,




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NurAiman_M_Intel
Employee
655 Views

Hi,


To access read and write flash, you will need to use configuration IP.


Example:

Serial Flash controller ii IP

 

You need to write your own RTL code to read and write flash using this IP.


Thanks.


Regards,

Aiman


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JET60200
New Contributor I
648 Views

Thanks @NurAiman_M_Intel for reply, 

    if there's an example design which demostrate the usgae of "Serial Flash IP", which will be great helpful as well.  

 

 

 

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NurAiman_M_Intel
Employee
643 Views

Hi,


You don't really have to use serial flash IP. You may also use other IP for your design. Below are the link to design references:

https://fpgacloud.intel.com/devstore/platform/18.1std.1/Standard/generic-serial-flash-interface-and-nios-ii-booting/


https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-design-example/


Thanks.


Regards,

Aiman


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