I searched the forum, I consulted google, but was unable to find any relevant information. Hoping someone can point me in the right direction.
I am using a cyclone 5 (it is actually the MitySoM module from Critical Link, an Altera partner). I want to write data from the FPGA to the DDR mempry over the f2h_sdram bridge. More specifically, I am from trying to using the frame buffer from Altera's VIP in a video application.
In trying to bring this system up, i want to be able to use system console so it's not software dependent. I want to use trace system + system console to verify before bringing software into it.
I know that the HPS peripherals , and the bridge specifically, needs to be initialized. I know the u-boot bootloader normally does this. How can I initialize the bridge if I'm just using just system console?
Thanks for any help
