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I'm still new to CPLD's. I'm using a MAX II and I was wondering how to best make use of the two banks the device offers.
Apparently you can have different banks operate at different I/O voltage levels. Is this true? If I only use one bank, can I still utilize all of the LE's in the device, or if I just use bank 1 for all of my pin I/O, will I be only able to use half of the devices' LEs? JasonLink Copied
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Welcome Jason,
Your design can utilize the entire internal capabilities of the part regardless of the voltage levels on any of the banks. Think of the IO Banks as a sort of Voltage levle translator between the outside world and the internal logic of the FPGA. Good luck with you design efforts. Regards, Avatar- Mark as New
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jason,
Yes, the device's I/Os are grouped into serveral banks and each bank can have it's own I/O voltage (VCCIO). You can use all of the LEs (and other "core" resources), no matter how many I/O banks you use or what VCCIO you use.
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