jtag Daisy Chain compiler setting ?

[IAbid]

Hi,

I need some information regarding a design, where if two devices are JTAG daisy chained e.g. Altera CPLD and Atmel SAM4E series microcontroller.

As far as the hardware and layout is concerned, I know how to daisy chain, however I dont know how can I tell the programmer to program Altera CPLD and to IGNORE the SAM4E microcontroller.

Also I prefer to work with make files, is there a way I include that instruction in my Makefile so that when I issue "make program" it ignores SAM4E microcontroller and programs Altera CPLD?

I thank you for your help.

[Nooraini_Y_Intel]

​​Hi,

Currently I am reviewing the forum for any open questions and found this thread. I apologize that no one seems to answer this question that you posted. Since it has been a while you posted this question, I'm wondering if you have found the answer? If not, please let me know, I will try to assign/find someone to assist you. Please do expect some delay in response as most of our agents are out of office due to the year-end holidays. Thank you.

Regards,

Nooraini

[Nooraini_Y_Intel]

Hi IAbid,

Happy New Year. Please refer to the attached document for the steps to add and bypass non-Intel (Altera) FPGA/CPLD devices in Quartus programmer tools. Thank you.

Regards.

Nooraini