making a processor

[Altera_Forum]

I am currently working on a processibng machine that will be programmed onto an altera fpga cyclone 2. I have completed the code and found an interesting issue. it is a 16 bit input and output. i can subtract 1 1 1 1 from 5 5 5 5 and get 4 4 4 4 but i cant subtract 1 1 1 1 from 0 0 0 0 and get F F F F here is the code:

i have omitted the clock debouncing modules

[Altera_Forum]

--- Quote Start ---   i can subtract 1 1 1 1 from 5 5 5 5 and get 4 4 4 4 but i cant subtract 1 1 1 1 from 0 0 0 0 and get F F F F  --- Quote End ---  Maybe that is because 0000 minus 1111 equals EEEF not FFFF. 0000 - 0001 would be FFFF.