Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21602 Discussions

max CID length for transceivers

Altera_Forum
Honored Contributor II
3,713 Views

Does anyone know what is the max CID (consecutive identical digits) length the CDR can tolerate before it loses its lock on the incoming data? I've been reading through the docs for the Stratix IV transceivers and I can't seem to find a number on the max CID run length that relates to the CDR locking. If anyone knows or could point me to the information I'd really appreciate it. Thanks!

0 Kudos
5 Replies
Altera_Forum
Honored Contributor II
2,370 Views

I guess, there's no explicite specification, because all relevant Gigabit physical layers are using 8b/10b encoding, which has a well known CID length.

0 Kudos
Altera_Forum
Honored Contributor II
2,370 Views

So what happens if I'm not using 8b/10b encoding? There must be some CID length specified somewhere that the CDR can tolerate, right? The transceivers have the option to not include 8b/10b in the path so there must be some limit on the CID run length before the CDR loses its lock on the data. Any idea where I can find this run length number?

0 Kudos
Altera_Forum
Honored Contributor II
2,370 Views

I found, that the Stratix IV datasheet is specifying a run length violation decoder in detail. You may want to read the datasheet more thoroughly. There's also a typical run length specification of 80 without additional explanation. I understand, that the CDR circuit is able to handle run lengths in this order of magnitude. As a prerequisite, the Stratix IV receiver can be configured for DC coupling, so the data stream can be unbalanced.

0 Kudos
Altera_Forum
Honored Contributor II
2,370 Views

Thanks. I had seen the information on the programmable run length violation detection before, but it is located in the word aligner block and doesn't seem to have anything to do with the CDR. Plus, if I'm not using the word aligner I'm not sure I can use this decoder. I may be wrong, but at least the way it's described I don't think this is the same as the max CID run length the CDR can tolerate before it loses the lock on the data. 

 

I did find in the datasheet (not the handbook) a single line listing the run length maximum of 200 UI. There is no explanation or further description of this line, but maybe this is the number I was looking for. 

 

Thanks for your help!
0 Kudos
Altera_Forum
Honored Contributor II
2,370 Views

I think the run length violation detection info matters, because it implies that a respective run length can be processed by the receiver channel at all, (although nothing is explicitely said about CDR usage). 

 

Even if the CDR can operate at 200 run length, I would try to avoid that high run lengths in a protocol, because it implies higher jitter sensitivity and long locking times, or in other words, low robustness.
0 Kudos
Reply