memory initializing into 16-words per line instead of 4 words (initialize from ihex)

[Altera_Forum]

This seems strange. In ModelSim (and Quartus, I beleive), our *.hex files initialize what seems to be in 16-word blocks rather than 4-word blocks. I've attached a screenshot each. 

 As you can see, the first two lines of the ihex file is: [word0], [word1], [word2], [word3]  BUT the memory appears as: [word0], [word1], [word2], [word3], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000], [0x0000]   Basically, for each line in the ihex file (4 words), there are 16 words written to memory. These 16 are the original 4 words, then 12 words of zeros. Has anyone else had this problem or know how to fix it?  ** Update: In Quartus, this seems to be resolved by Assignments>Settings>Compilation Process Settings> More Settings> Reading or writing Hexadecimal(.hex) File in byte addresable mode On. However, this option is not available in ModelSim.

[Altera_Forum]

There seems to be a discrepancy in words size, byte versus double word addressing. Please show the memory definition.

[Altera_Forum]

FvM,  

 I've attached both the RAM generation file and the Intel hex file...  One solution we thought of is to simply skip 12 addresses at a time: assign reduced_addr = {addr[31:4],2'b0,addr[3:2]}; // this converts 16-word addressing into 4-word addressing  This works, but we lose 75% of available memory doing so.