1) need forum admin to help, I can not post any reply to below topic. Not sure if it's a website bug.
2) answer to below topic:
Did the calibration finished properly in the design?
> Yes, it's running on actual demo board, and the local_init_done = high
What is the test_start signal does?
> It's not related to ddr2. It's only a signal for my application after ddr2 ready.
Is there a waitrequest signal in your design?
> not used.
How do you perform the write and read transaction?
> you can look at below picture by ddr2 controller local interface, such as local_address, local_wdata, local_write_req, local_burstbegin..... I am using the exact sequence documented in intel guideline.
3) correct one information: ddr2 part number is MT47H32M16CC-3
https://community.intel.com/t5/Programmable-Devices/problem-using-altmemphy-to-read-ddr2/m-p/1382338
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Hello,
The local_ready still been asserted in the write transaction which I think the transaction still not be done.
You can enable the ECC in the EMIF IP setting to see if there is data error in your design.
Thanks.
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