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problems with passive serial configuration of EP4CGX150DF31C8N from host processor

CNash2
Beginner
571 Views

get multiple nstatus assertions. at consistent point during configuration cycle

 

q v17 and v15 used with and without compression

schematic as per handbook

msel3-0 = 1000

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2 Replies
ShafiqY_Intel
Employee
279 Views

Hi CNash2,

 

When you want to program the design into CFI flash, Make sure you tick only on "your design". do not tick the bit_option

For more details, maybe you can refer to forum below. I answered to the user there.

https://forums.intel.com/s/question/0D70P000006Qq88/problem-configuring-cyclone-10-lp-in-passive-ser...

 

Cheers.

CNash2
Beginner
279 Views
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