Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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simulation

Altera_Forum
Honored Contributor II
‎04-16-2010 03:43 PM
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hello  

 

i want to simulate frequency devidor with devision of 50 000 000 (from 50 MH z to reach 1 second period ) but how can i simulate this ... if i try with modelsim it takes many time to calculate the result .... is there faster way ?
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Altera_Forum
Honored Contributor II
‎04-16-2010 09:46 PM
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For functional simulation you only need to try any small test counter. Then the 1 sec issue can be thought of as just a scaled case. 

 

For timing verification, use hardware e.g. led flashing rate.
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