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stratix iii FPGA-The AS prom configuration is not happening

Altera_Forum
Honored Contributor II
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i have a custom board with stratix iii FPGA. The AS prom configuration is not happening. After debug, it was found that nSTATUS pin impedance w.r.t Gnd is around 3 ohm. Config through JTAG is ok and all peripheral are working well.

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Altera_Forum
Honored Contributor II
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What voltage do you see on nSTATUS once the FPGA is configured? Can I assume you have a pull-up resistor fitted to the pin? 

 

3 ohms doesn't sound good. However, if you measured that with the board on but without the FPGA configured, that could make sense. 

 

Referring to: configuring stratix iii devices (http://www.altera.com/literature/hb/stx3/stx3_siii51011.pdf), figure 11-8 on page 11-18. Can you confirm this is how you've connected your FLASH device? Are your MSEL pins connected correctly? 

 

Regards, 

Alex
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Altera_Forum
Honored Contributor II
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nstatus pins always stuck to 0 volts. Pullup resistor of 10k is connected to nstatus. 3 ohm is measured in board's off condition. 

 

 

 

 

 

--- Quote Start ---  

What voltage do you see on nSTATUS once the FPGA is configured? Can I assume you have a pull-up resistor fitted to the pin? 

 

3 ohms doesn't sound good. However, if you measured that with the board on but without the FPGA configured, that could make sense. 

 

Referring to: configuring stratix iii devices (http://www.altera.com/literature/hb/stx3/stx3_siii51011.pdf), figure 11-8 on page 11-18. Can you confirm this is how you've connected your FLASH device? Are your MSEL pins connected correctly? 

 

Regards, 

Alex 

--- Quote End ---  

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Altera_Forum
Honored Contributor II
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nstatus pins always stuck to 0 volts. Pullup resistor of 10k is connected to nstatus. 3 ohm is measured in board's off condition.

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Altera_Forum
Honored Contributor II
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I have to assume there is a build fault on your board. Do you have another board to compare it to, or is this the only one? 

 

Unless nSTATUS is released, the AS configuration state machine is not going to start... 

 

Regards, 

Alex
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Altera_Forum
Honored Contributor II
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i hv removed the FPGA. and checked the resistance of nstatus pin on pcb with gnd. PCB is fine. I think device is faulty. In past i have made four such boards and never faced such problem. Can anybody tell me how to followup ALTERA to debug the device and get some alternative. Because it is quite expensive device

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Altera_Forum
Honored Contributor II
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The hot socketing circuit is not present on nstatus. In our design i have only onnected pullup resistor of 10k to the nstatus and it is not driven by any circuitary

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