unable to read data on Interrupt

[Altera_Forum]

I have ALtera DE2_115 Board having Cyclone IV E, 

 I am getting 8 bit data on 8-bit bus @ 125 kbps along with Clock.  now i treat this clock (125kbps) as a interrupt and read 8-bit bus data on every clock.  my Nios Processor misses some data while reading.   input data :0,1,2,3,4,5,6,......................................255,0,1,2,3,4,5......255,0,1,2,3..............129 = 640 received data:0,1,2,--miss some data---251,252,253...255,0,1,2--again miss some data---255,---- = 640    static void *handle_load_interrupts(void* context, alt_u32 id) { edge_capture = 0; volatile int* edge_capture_ptr = (volatile int*) context; *edge_capture_ptr = IORD_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_BASE); //Store the value in the LOAD edge capture register in *context IOWR_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_BASE,0); //Reset the LOAD edge capture register IORD_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_BASE); //Read the PIO to delay ISR exit. this is done to prevent a spurious } /* Enable all 4 button interrupts. */ IOWR_ALTERA_AVALON_PIO_IRQ_MASK(LOAD_BASE, 0x01); /* Reset the edge capture register. */ IOWR_ALTERA_AVALON_PIO_EDGE_CAP(LOAD_BASE, 0x0); alt_ic_isr_register(LOAD_IRQ_INTERRUPT_CONTROLLER_ID, LOAD_IRQ,handle_load_interrupts, edge_capture_ptr, 0x0); --------------------------------------------------------------------------- ---this is the receiver code who read data from external bus "DATA"--- do { if( edge_capture) //w.r.t. clock or LOAD Pulse from "sync_detect" { ImgBuff = IORD_ALTERA_AVALON_PIO_DATA(DATA_BASE); Count++; edge_capture = 0; //reset generated LOAD interrupt } if(Count == 640-1) //check end of data -->640 { Count = 0; //Point to Start of data LPktCount++; //Increment Count } }while(LPktCount != (400-1));   Regards  Kaushal

[Altera_Forum]

125kbps means irq handler needs to be called within a 8us period. Any delay would lead to missing data. 

So, I guess this isr freuqency is too fast for your Nios system.  What's the system clock frequency? Do you use an OS or do you have any other isr? Does you code runs on onchip memory or dram? Does your Nios have code cache?

[Altera_Forum]

Hello 

I have following Clock frequencye's:  clk_50 External 50 MHz altpp_sys pll.c0 100Mhz altpll_sdram pll.c1 100Mhz altpll_io pll.c2 10Mhz altpll_25 pll.c3 25Mhz  Yes ! i am using MicroC/OS-II  I have customize the Demo Version of Simple_Socket_Server Example on DE2 board.   I have attached my Project along with Software files, my receiver Code is "simple_socket_server.c" over there i add the isr who is looking for external pin "LOAD" status if it is high it generate a high at "edge_capture" pin which further use for reading the bus data.  Regards  Kauhsla

[Altera_Forum]

Attached is the Received Waveform on Oscilloscope, showing missing Interrupt on NIOS-II  

TTL_CLK = 1MHZ LOAD = 125 kHz TEMP_OUT = Edge_capture by nios processor

[Altera_Forum]

That's pretty normal with MicroC/OS, since any OS uses a periodic high priority interrupt to schedule tasks and this is working in the background, hidden to the user application. Moreover, if you are using the simple_socket_server application template, you also have a high priority tasks which manages the network communication.  

Since any scheduler isr (and possibly task switching) requires several us, you definitely can not make your application work that way. Using interrupts is generally deprecated in an OS environment, unless you know very very well what are you doing and you are very careful, otherwise you are risking to mess up everything. I suggest you collect your data with a fifo, dma or any other real time hardware.  MicroC/OS and all 'real time' operating systems are real time only to the ms scale level.

[Altera_Forum]

--- Quote Start ---  That's pretty normal with MicroC/OS, since any OS uses a periodic high priority interrupt to schedule tasks and this is working in the background, hidden to the user application. Moreover, if you are using the simple_socket_server application template, you also have a high priority tasks which manages the network communication.  Since any scheduler isr (and possibly task switching) requires several us, you definitely can not make your application work that way. Using interrupts is generally deprecated in an OS environment, unless you know very very well what are you doing and you are very careful, otherwise you are risking to mess up everything. I suggest you collect your data with a fifo, dma or any other real time hardware.  MicroC/OS and all 'real time' operating systems are real time only to the ms scale level.  --- Quote End ---    thanking you cris, i will do the same as you suggested.

[Altera_Forum]

Another solution (but I don't recommend it) would be assigning the highest priority to your PIO interrupt in SOPC design. 

This way the isr function (which should be as short as possible) would be able to interrupt even OS scheduler and probably it could make the trick. Anyway, you must be very careful not to interfer with OS or you'll mess up everything.