Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.

How cycles are counted when instruction on core waits for data from memory?

Alexander_Alexeev
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Hello, this question might sound too simple, but I would like to double check.

So, when a core is waiting for data from  memory, would those clock ticks show up as busy (unhalted)?

If they are shown as halted, does it happen always, or it depends from other instructions speculatively executed?

I saw in VTune that core is unhalted, but what should happen theoretically, how it should be displayed?

 

Thanks,

Alexander. 

 

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Patrick_F_Intel1
Employee
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Hello Alexander,

Yes, the CPU is unhalted waiting for the memory. If the prefetchers are able to latch onto the memory access pattern, the amount of time spent waiting on memory can be pretty small. For truly random memory access (prefetcher can't help and not already in cache) the CPU can wait for 100s of cycles. The cpu will try to speculatively execute instructions to stay busy but, in the case of the linked-list, dependent load memory latency test, the cpu just has to wait because the next load instruction can't be executed until the current load is completed.

Pat

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Bernard
Valued Contributor I
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I think that CPU will also try to execute independent of linked(or unrelated to) list pointers code and only if such a code is present.

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