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HungLam
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Posted
Re: Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
on
FPGA, SoC, And CPLD Boards And Kits
.
06-11-2020
04:15 AM
Posted
Re: Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
on
FPGA, SoC, And CPLD Boards And Kits
.
06-11-2020
04:13 AM
Posted
Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
on
FPGA, SoC, And CPLD Boards And Kits
.
06-11-2020
12:10 AM
Posted
Is 10AX066K3F35I2SG PinOut compatible with 10AX048K3F35I2SG?
on
FPGA, SoC, And CPLD Boards And Kits
.
05-06-2020
11:00 PM
Posted
Re: NAND Flash controller Intel IP
on
FPGA, SoC, And CPLD Boards And Kits
.
04-17-2020
07:15 AM
Posted
NAND Flash controller Intel IP
on
FPGA, SoC, And CPLD Boards And Kits
.
04-14-2020
11:55 PM
Posted
NOR Flash Device on Cyclone 10 GX dev kit only support JTAG update, not application without JTAG?
on
FPGA, SoC, And CPLD Boards And Kits
.
04-14-2020
04:29 AM
Posted
Re: How to build .sof file for Arria 10 fpga dev kit - engineering sample
on
FPGA, SoC, And CPLD Boards And Kits
.
01-21-2020
08:51 AM
Posted
Re: How to build .sof file for Arria 10 fpga dev kit - engineering sample
on
FPGA, SoC, And CPLD Boards And Kits
.
01-21-2020
08:15 AM
Posted
How to build .sof file for Arria 10 fpga dev kit - engineering sample
on
FPGA, SoC, And CPLD Boards And Kits
.
01-21-2020
07:24 AM
Posted
Re: Hi, I am trying to use intel's PCIE Avalon MM DMA IP core. Is there a way for me to generate this core outside platform designer? Also is there an example to instantiate this dma engine without using platform designer.
on
Intel® SoC FPGA Embedded Development Suite
.
01-14-2020
06:39 PM
Posted
Re: Hi, I am trying to use intel's PCIE Avalon MM DMA IP core. Is there a way for me to generate this core outside platform designer? Also is there an example to instantiate this dma engine without using platform designer.
on
Intel® SoC FPGA Embedded Development Suite
.
01-13-2020
10:05 PM
Posted
Hi, I am trying to use intel's PCIE Avalon MM DMA IP core. Is there a way for me to generate this core outside platform designer? Also is there an example to instantiate this dma engine without using platform designer.
on
Intel® SoC FPGA Embedded Development Suite
.
01-13-2020
05:33 PM
Posted
Re: A10 GX DEV KIT - PCIE to control SPI core ( 3 wire) IP - Regmap
on
FPGA, SoC, And CPLD Boards And Kits
.
12-13-2019
06:12 PM
Posted
A10 GX DEV KIT - PCIE to control SPI core ( 3 wire) IP - Regmap
on
FPGA, SoC, And CPLD Boards And Kits
.
12-12-2019
07:33 PM
Posted
Re: Hi, I cannot generate a time-limited .sof file. Keep getting unlicensed IP error for nios as well as the third party IP. But when I comment out nios subsystem from my design I do not get any error and I am able to generate a sof file.
on
Nios® II Embedded Design Suite (EDS)
.
12-11-2019
05:41 PM
Posted
Hi, I cannot generate a time-limited .sof file. Keep getting unlicensed IP error for nios as well as the third party IP. But when I comment out nios subsystem from my design I do not get any error and I am able to generate a sof file.
on
Nios® II Embedded Design Suite (EDS)
.
12-10-2019
10:02 PM
Posted
Re: Problem generating new .sof file with unlicensed IP : "NIOS II processor"
on
Nios® II Embedded Design Suite (EDS)
.
12-10-2019
09:56 PM
Posted
Refclk for Arria 10 transceiver - REFCLK_GXBLxC_CHTP/N vs REFCLK_GXBLxC_CHBP/N
on
Intel® FPGA University Program
.
10-22-2019
11:23 PM
Posted
How to change default clock frequency in A10 fpga dev kit
on
FPGA, SoC, And CPLD Boards And Kits
.
10-16-2019
12:49 AM
Latest posts by HungLam
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Posted
Re: Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
FPGA, SoC, And CPLD Boards And Kits
113
06-11-2020
04:15 AM
Re: Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
FPGA, SoC, And CPLD Boards And Kits
113
06-11-2020
04:13 AM
Intel FPGA Arria 10 GX Dev kit - Gen3 card could not been detected while inserting PCIe extension cable adapter
FPGA, SoC, And CPLD Boards And Kits
143
06-11-2020
12:10 AM
Is 10AX066K3F35I2SG PinOut compatible with 10AX048K3F35I2SG?
FPGA, SoC, And CPLD Boards And Kits
93
05-06-2020
11:00 PM
Re: NAND Flash controller Intel IP
FPGA, SoC, And CPLD Boards And Kits
64
04-17-2020
07:15 AM
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Member Since
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