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I am trying to use Vector_Add example on DE5-Net board. I have installed the board and driver:
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ aocl diagnose
Verified that the kernel mode driver is installed on the host machine.
Using board package from vendor: Terasic Corporation
Querying information for all supported devices that are installed on the host machine ...
Device Name Status Information
acl0 Passed Stratix V Reference Platform
PCIe dev_id = D800, bus:slot.func = 23:00.00, at Gen 2 with 8 lanes
FPGA temperature = 35 degrees C.
Found 1 active device(s) installed on the host machine. To perform a full diagnostic on a specific device, please run
aocl diagnose <device_name>
DIAGNOSTIC_PASSED
Call "aocl diagnose <device-names>" to run diagnose for specified devices
Call "aocl diagnose all" to run diagnose for all devices
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ aocl diagnose acl0
Verified that the kernel mode driver is installed on the host machine.
Using platform: Intel(R) FPGA SDK for OpenCL(TM)
Using Device with name: de5net_a7 : Stratix V Reference Platform
Using Device from vendor: Terasic Corporation
clGetDeviceInfo CL_DEVICE_GLOBAL_MEM_SIZE = 4294967296
clGetDeviceInfo CL_DEVICE_MAX_MEM_ALLOC_SIZE = 4293918720
Memory consumed for internal use = 1048576
Actual maximum buffer size = 4293918720 bytes
Writing 4095 MB to global memory ...
Allocated 1073741824 Bytes host buffer for large transfers
Write speed: 1785.15 MB/s [1774.30 -> 1792.59]
Reading and verifying 4095 MB from global memory ...
Read speed: 1933.75 MB/s [1932.15 -> 1935.20]
Successfully wrote and readback 4095 MB buffer
Transferring 8192 KBs in 16 512 KB blocks ... 1578.84 MB/s
Transferring 8192 KBs in 8 1024 KB blocks ... 1429.86 MB/s
Transferring 8192 KBs in 4 2048 KB blocks ... 1774.93 MB/s
Transferring 8192 KBs in 2 4096 KB blocks ... 1823.38 MB/s
Transferring 8192 KBs in 1 8192 KB blocks ... 1840.76 MB/s
PCIe Gen2.0 peak speed: 500MB/s/lane
Writing 8192 KBs with block size (in bytes) below:
Block_Size Avg Max Min End-End (MB/s)
524288 1326.17 1438.37 1214.92 1312.46
1048576 1193.22 1313.45 1045.00 1176.04
2097152 1490.95 1555.86 1403.88 1484.81
4194304 1585.38 1621.38 1550.94 1581.38
8388608 1603.46 1603.46 1603.46 1603.46
Reading 8192 KBs with block size (in bytes) below:
Block_Size Avg Max Min End-End (MB/s)
524288 1540.32 1578.84 1484.84 1521.98
1048576 1403.07 1429.86 1354.74 1384.46
2097152 1752.02 1774.93 1720.33 1745.27
4194304 1771.19 1823.38 1721.91 1768.86
8388608 1840.76 1840.76 1840.76 1840.76
Write top speed = 1621.38 MB/s
Read top speed = 1840.76 MB/s
Throughput = 1731.07 MB/s
DIAGNOSTIC_PASSED
I have built the host and device:
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ aocl env bin/vector_add.aocx
INPUT_ARGS=device/vector_add.cl -o bin/vector_add.aocx --board de5net_a7 --report
BUILD_NUMBER=614
ACL_VERSION=18.0.0
OPERATING_SYSTEM=linux
BOARD_SPEC_XML=/tools/intelFPGA/18.0/hld/board/trasic/de5net/hardware/de5net_a7/board_spec.xml
PLATFORM_TYPE=s5_net
CLANG_VERSION=Intel(R) FPGA SDK for OpenCL(TM), Version 18.0.0 Build 614 Standard Edition, Copyright (C) 2018 Intel Corporation clang version 3.0 (tags/RELEASE_30/final) Target: x86_64-unknown-linux-gnu Thread model: posix
LLC_VERSION=Intel(R) FPGA SDK for OpenCL(TM), Version 18.0.0 Build 614 Standard Edition, Copyright (C) 2018 Intel Corporation Low Level Virtual Machine (http://llvm.org/): llvm version 3.0 Optimized build with assertions. Built Apr 25 2018 (07:54:54). Host: x86_64-unknown-linux-gnu Host CPU: (unknown) Registered Targets: arm - ARM fpga - FPGA Backend fpga64be - FPGA Big Endian Backend griffin - Griffin thumb - Thumb virtualfabric - FPGA Virtual Fabric x86 - 32-bit X86: Pentium-Pro and above x86-64 - 64-bit X86: EM64T and AMD64
SYS_INTEGRATOR_VERSION=$Header: //acds/rel/18.0std/acl/sysgen/system_integrator/main.cpp#1 $
LIB_PATH=/tools/intelFPGA/18.0/hld/host/linux64/lib:/tools/intelFPGA/18.0/hld/linux64/lib:/tools/intelFPGA/18.0/quartus/bin:/tools/intelFPGA/18.0/hld/linux64/lib/dspba/linux64:/opt/xilinx/xrt/lib:/tools/intelFPGA/18.0/hld/board/trasic/de5net/linux64/lib:/tools/intelFPGA/18.0/hld/linux64/lib:/tools/intelFPGA/18.0/hld/linux64/lib:/opt/xilinx/xrt/lib:/tools/intelFPGA/18.0/hld/board/trasic/de5net/linux64/lib:/tools/intelFPGA/18.0/hld/linux64/lib:/tools/intelFPGA/18.0/hld/linux64/lib:
AOCL_BOARD_PKG_ROOT=/tools/intelFPGA/18.0/hld/board/trasic/de5net
QUARTUS_VERSION=Quartus Prime Shell Version 18.0.0 Build 614 04/24/2018 SJ Standard Edition Copyright (C) 2018 Intel Corporation. All rights reserved.
QUARTUS_OPTIONS=quartus_sh --flow compile top -c top
ACL_QSH_COMPILE_CMD=
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ make
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ aocl program acl0 bin/vector_add.aocx
aocl program: Running program from /tools/intelFPGA/19.1/hld/board/trasic/de5net/linux64/libexec
Start to program the device acl0 ...
Program succeed.
but when I try to run the application I get an error:
argus@argus-R815:/tools/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ bin/host
Initializing OpenCL
ERROR: Unable to find Intel(R) FPGA OpenCL platform.
This is the host code that throws error:
bool init_opencl() {
cl_int status;
printf("Initializing OpenCL\n");
if(!setCwdToExeDir()) {
return false;
}
// Get the OpenCL platform.
platform = findPlatform("Intel(R) FPGA SDK for OpenCL(TM)");
if(platform == NULL) {
printf("ERROR: Unable to find Intel(R) FPGA OpenCL platform.\n");
return false;
}
// Query the available OpenCL device.
device.reset(getDevices(platform, CL_DEVICE_TYPE_ALL, &num_devices));
printf("Platform: %s\n", getPlatformName(platform).c_str());
printf("Using %d device(s)\n", num_devices);
for(unsigned i = 0; i < num_devices; ++i) {
printf(" %s\n", getDeviceName(device[i]).c_str());
}
Any suggestion on what I may be missing?
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You are using a Terasic board, not an Intel board. You should probably change the string in the findPlatform() function to something else. Try "Terasic" or "Stratix".
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Hi
Please let us know whether the issue was solved after changing the platform name.
Also it is seen that two different versions of Quartus are being used as from logs i.e 18.0 and 19.1.
Please use one version of Quartus and the supported similar version of OpenCL SDK to test the execution.
Thanks and Regards
Anil
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Hi ,
Please let us know whether updating the platform name helped in resolving the issue.
Thanks and Regards
Anil
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