Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
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Role of the DIFFIO_RX in FPGA MAX10 10M50DA

MHASI2
Novice
1,021 Views

​What is the main role of the DIFFIO_RX pin in the MAX10 IC itself?

May I know the condition of the IC when the DIFFIO_RX becomes "High" state and vice versa.

Looking forward for the answer.

Thank you.

 

 

 

 

 

 

 

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YuanLi_S_Intel
Employee
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Hi Muhammad,

 

I/O with this DIFFIO_RX means that the I/O can be used for transceiver RX channel. The condition of the FPGA is depending on the design itself since FPGA is configurable.

 

Thank You.

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