Role of the DIFFIO_RX in FPGA MAX10 10M50DA

[MHASI2]

​What is the main role of the DIFFIO_RX pin in the MAX10 IC itself?

May I know the condition of the IC when the DIFFIO_RX becomes "High" state and vice versa.

Looking forward for the answer.

Thank you.

[YuanLi_S_Intel]

Hi Muhammad,

I/O with this DIFFIO_RX means that the I/O can be used for transceiver RX channel. The condition of the FPGA is depending on the design itself since FPGA is configurable.

Thank You.