- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello Michael,
we are designing a board where i210IS will be connected with iMX6 and FPGA, so we must simulate PCIe and SGMII connections on PCB.
Best regards,
Ryszard
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello, @RMile:
Thank you for contacting Intel Embedded Community.
The Intel(R) Ethernet Controller I210/I211: Boundary Scan Description Language [BSDL] file document # 497626 is the one that may help you. It can be found when you are logged into your Resource & Design Center (RDC) privileged account at the following website:
http://www.intel.com/cd/edesign/library/asmo-na/eng/497626.htm
The RDC Account Support form is the channel to process your account update request. It can be found at:
https://www.intel.com/content/www/us/en/forms/design/contact-support.html
Best regards,
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page