10G MAC ip core stop working after a long time ethernet packets transmission

[Altera_Forum]

Hello guys, 

 I encountered a problem when I was debugging the Ethernet connection between two DE5 board. The DE5 board contains one Stratix V FPGA. I instantiated one PHY_10GBASE_R ip core and one 10G MAC ip core in each FPGA to build the Ethernet interface. Assuming one board is the master board and the other is the slave board. I used the master board to transmit ethernet packets to the slave board. When slave board received packets, it just transmitted these packets back to master. Master board matched the sent and received packets and checked the ethernet connection.   At first, the Ethernet connection seems working well. Packets can be exchanged between these two boards. But when I have kept the transmission working for a long time, it would shut down automatically. I found the problem caused by the avalon_st_tx_ready signal comes from 10G MAC core. Usually, this signal is high. Sometimes it fall to low but would retrieve to high quickly. But after working for a long time, this signal fell to low and couldn't retrieve. I don't know why it can't retrieve. I was trying to reset the 10G MAC core, the avalon_st_tx_ready signal can be retrieved. But when I started the transmission again, the avalon_st_tx_ready signal fell again.   Does anyone run into the same problem? Please give me some clue or advice.   Thanks  ---------------------------------------------------------------------------------------------  This problem comes from a license issue. 10G MAC ip core is not a free ip core. After the ip core works for a certain period, it will stop working automatically.