I use a ALTASMI_PARALLEL and a ALTEREMOTE_UPDATE megafunctions in a cyclone III. All the design is full synchro and use a rising edge of a 12MHz clock. I want to know if it's possible to use the same clock (also on rising edge) for clkin of ALTASMI_PARALLEL and clock for ALTREMOTE_UPDATE?
The documentation is not clear!
Thank you for your help.
Currently I am reviewing the forum for any open questions and found this thread. I apologize that no one seems to answer this question that you posted. Since it has been a while you posted this question, I'm wondering if you have found the answer? If not, please let me know, I will try to assign/find someone to assist you. Please do expect some delay in response as most of our agents are out of office due to the year-end holidays. Thank you.
The answer can be found from the other thread that you have posted:
You can use the same clock source as the clock input for both ALTASMI_PARALLEL and ALTEREMOTE_UPDATE megafunction. There is no restriction that you need to use different clock source to each IP/megafunction.
I'm sure what is the difference between 1 and 2. ALTASMI IP sample the signals(write , wren, shift_bytes, data_in.....) on the rising edge of the clkin signal. You can just use the generate the singals base on the rising edge of the clkin signal. As far I checked internally, there are no timing constraint requirement for both ALTASMI_PARALLEL and ALTEREMOTE_UPDATE IP since these are hard block inside the device. There should not be any timing path for hard block inside the device.