AN829 - PCIE AVMM DMA for external memory - Failed when change from DDR4 to DDR3 protocol

[HungLam]

Hi,

I refered to AN829 to make the change of EMIF from DDR4 to DDR3. I have adapted the same. And finally, there are several errors, but I am not able to locate where to fix them.

"Error(19179): The EMIF interface has an input connection from the core (top_hw|mm_interconnect_0|agent_pipeline|gen_inst[4].core|data1[5]) that does not connect to a pin. Please review the top-level design to make sure all memory interface signals are connected to the top-level"

You please let me know how to fix these errors. Or where to find the cause of these errors.

Thanks a lot!

[BoonT_Intel]

Hi Sir,

check from the RTL, the signal top_hw|mm_interconnect_0|agent_pipeline|gen_inst[4].core|data1[5] connect to what signal. I guess it is now floating at higher level. This signal need to connect to certain signal or logic.

[HungLam]

Thanks a lot for your answer. I reviewed RTL, but could not figure out the issue, as core.data1[5] is not floating. But I was able to fix it, by checking EMIF interface again, then found some pin was only for DDR4, not DDR3. After removing them, I passed these errors.

[BoonT_Intel]

Glad to know it is solve now. Yes, the pin for DDR4 and DDR3 is incompatible. You need some modification to the RTL when migrate the IP protocol.

Cheers!