Avalon-ST Test Pattern Generator and Checker

Altera_Forum · ‎08-26-2012

Hello,

I designed my custom Avalon-ST peripheral and would like to test in on my FPGA. I found Altera's Avalon-ST Test Pattern Generator and Checker IPs and would like to use them in my tests. I try to generate packets(!), but nothing happens. At the end I connected Generator with Checker direct and looked with SignalTap on my Avalon-ST bus, but nothing was there.

For initialization I use Altera's API commands in this order:

data_source_reset(0x5000880) ;

data_sink_reset(0x5000860) ;

usleep(1700000) ;

data_sink_init(0x5000860) ;

data_sink_set_enable(0x5000860, 0x1) ;

usleep(1700000) ;

data_source_init(0x5000880, 0x5000890) ;

data_source_set_enable(0x5000880, 0x1) ;

usleep(1700000) ;

The addresses are defined in system.h:

# define SINK_0_BASE 0x5000860

# define SOURCE_0_COMMAND_BASE 0x5000890

# define SOURCE_0_CSR_BASE 0x5000880

What am I doing wrong? How should I start the packet generator? This problem tortures me the whole weekend.

Regards,

Linas

Altera_Forum · ‎09-19-2012

I solved it:

data_sink_init(SINK_0_BASE);

data_sink_set_enable(SINK_0_BASE, 1);

data_source_set_enable(SOURCE_0_CSR_BASE, 1);

data_source_send_data(SOURCE_0_COMMAND_BASE, 1, 64, 0x03, 0, 0);

With these commands I am able to generate the needed packets.