FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6343 Discussions

Building an OSD with VIP Frame Reader

Altera_Forum
Honored Contributor II
1,047 Views

We're designing an OSD for our monitor project and what we are attempting to do is use a Frame Reader to read out our OSD frame as a single plane, 8 bit pixel. This 8 bit value is then converted to a full 30 bit color with 8 bits of alpha in a custom Color LUT. The development of the Color LUT was done using a test source to speed up build times. (No DDR controller was required therefore a Frame Reader was not used.) Now that we're integrating it into the main design the video path isn't working. 

 

It's most likely something in our Color LUT, but before I get too crazy trying to debug this I was wondering if the Frame Reader, or any VIP block for that matter, can actually produce a single color plane pixel. The FR wizard allows me to set it up as an 8 bit, 1 plane source but does it actually work in that configuration?
0 Kudos
6 Replies
Altera_Forum
Honored Contributor II
211 Views

did you try the TPG for a color plane?

0 Kudos
Altera_Forum
Honored Contributor II
211 Views

I used the TPG as a test source for developing the Color LUT block. However, it doesn't have the option to create a single color plane so I ran it as an 8 bit source with 3 color planes in series then fudged the control packet coming out of our LUT to be 3x wider than the original source.

0 Kudos
Altera_Forum
Honored Contributor II
211 Views

use TPG into CPS and extract a single color plane

0 Kudos
Altera_Forum
Honored Contributor II
211 Views

I tried that as well and the CPS put out an invalid control packet. It got to the end of the packet and asserted EOP then repeated the last 3 words and asserted EOP again. 

 

But the test environment isn't the issue anyways. We still need the Frame Reader to extract our OSD information from RAM, ideally as 8 bit, single plane pixels.
0 Kudos
Altera_Forum
Honored Contributor II
211 Views

i think there is a reference design by vipjon on the forum that has OSD functionality with the frame reader

0 Kudos
Altera_Forum
Honored Contributor II
211 Views

It may worth SignalTaping the Valid/Ready signal along the video path to see if any block creating backpressure.

0 Kudos
Reply