FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

DDR-SDRAM controler

Altera_Forum
Honored Contributor II
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I have found some strange behavior of DDRSDRAM-controler. 

when power up my system, the core does not work good. 

but, once I put reset signal in the SOPC builder. 

it works well. 

 

I thought this is matter of time. 

so, I made counter which count till 1sec ( I tried 10 sec as well ). 

and make reset signal. 

but the reset does not work. no matter how long it waits. 

then I put reset signal externally, it works again. 

 

what happens in the SDRAM?
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